RTL design
VHDL, Verilog and SystemVerilog architecture and RTL ownership.
FPGA · USA
FPGA recruitment across USA
Technical recruitment for RTL design, verification, implementation and FPGA system integration, across RunTime’s published US markets.
Two ways to hire
Specialist search or ongoing recruitment support.
Specialist Recruitment
For an individual engineering hire or defined search, with a clarified brief, direct approach and evidence-led shortlist.
Embedded Recruiter
For a wider hiring plan where Lance works alongside engineering managers and supports the agreed recruitment workflow.
Explore Embedded Recruiter →Technical scope
FPGA recruitment is defined around the work.
Design, verification and implementation responsibilities overlap, but they require different evidence. A candidate who writes RTL may not own constraints, timing closure or hardware integration.
Verification
Simulation, testbenches, UVM and formal methods where relevant.
Implementation
Synthesis, constraints, timing closure and clock domain crossing.
System integration
FPGA SoCs, processors, interfaces, embedded software and hardware debug.
Published markets
Choose the page that matches your hiring plan.
AustinFPGA recruitment across Austin.→BostonFPGA recruitment across Greater Boston.→San Francisco Bay AreaFPGA recruitment across San Francisco Bay Area and Silicon Valley.→San DiegoFPGA recruitment across Greater San Diego.→IrvineFPGA recruitment across Irvine and Orange County.→Raleigh–DurhamFPGA recruitment across Raleigh–Durham and the Research Triangle.→SeattleFPGA recruitment across Greater Seattle.→Los AngelesFPGA recruitment across Greater Los Angeles.→Dallas–Fort WorthFPGA recruitment across Dallas–Fort Worth.→PhoenixFPGA recruitment across Phoenix, Chandler and Tempe.→
Discuss your hiring plan
Tell us what you need to build next.
Tell us what you’re building, who you need and when you need them. Choose Specialist Recruitment for a specific hire or Embedded Recruiter support for a wider hiring plan.