FPGA Recruitment · Greater San Diego
Specialist recruitment for RTL design, verification, implementation and FPGA system integration. Led by an engineer who understands the engineering behind the hire.
RunTime clarifies the engineering requirements, searches for relevant candidates, assesses their technical experience and delivers a focused shortlist for an individual role or defined search.
Discuss a specialist hireLance can work inside your hiring operation, collaborating with engineering managers and using your ATS and company email where agreed. This recruitment delivery model can support wider engineering hiring alongside fpga roles.
Discuss an embedded recruiterHow the Embedded Recruiter service works →FPGA recruitment specialisms
Design, verification and implementation responsibilities overlap, but they require different evidence. A candidate who writes RTL may not own constraints, timing closure or hardware integration.
VHDL, Verilog and SystemVerilog architecture and RTL ownership.
Simulation, testbenches, UVM and formal methods where relevant.
Synthesis, constraints, timing closure and clock domain crossing.
FPGA SoCs, processors, interfaces, embedded software and hardware debug.
For San Diego employers
We separate design, verification, implementation and integration responsibilities, then establish the device family, interfaces, toolchain and practical constraints.
Candidate discussions test architecture ownership, verification approach, timing closure, CDC decisions and the difference between simulation and physical hardware.
RunTime searches and directly approaches engineers whose experience aligns with the brief, then presents a focused shortlist with evidence, gaps and practical details.
Founder-led technical recruitment
Before recruitment, Lance Harvie developed electronics and firmware for industrial equipment, gaming systems and telecommunications products. He later built decades of specialist recruitment experience.
That background informs the questions RunTime asks about ownership, engineering decisions and fault investigation. It does not replace the client’s detailed technical interview.
RunTime Recruitment has operated since 2019.
More about Lance →
San Diego engineering context
Relevant local themes: wireless systems, embedded systems, signal processing, edge computing.
UC San Diego’s Wireless Embedded Systems program combines electrical engineering, computer science, communications and embedded system design. Its wireless research also spans sensing, edge compute, networking and deployed prototypes.
Those intersecting fields are useful context for teams defining RF, DSP, firmware and embedded-platform roles in San Diego.
Sources: UC San Diego Wireless Embedded Systems and UC San Diego WCSNG.
For FPGA engineers
Share your resume and the type of work you want to do. Include your preferred working arrangement, location or relocation constraints, and the parts of the development lifecycle you have personally owned.
Submit your resumeFrequently asked questions
RunTime clarifies what the engineer personally owned across design, verification, implementation and integration, then records evidence and open questions for the employer’s technical interview.
Yes. RunTime documents the employer’s actual working arrangement and presents it clearly. Onsite, hybrid and remote preferences are not treated as interchangeable.
Relocation can form part of the search where the employer is open to it. Interest, timing and practical constraints are confirmed with each candidate. No relocation or work-authorisation outcome is assumed.
It is designed for a wider or recurring hiring plan where recruitment continuity matters. It is a delivery model, not a reference to embedded software engineering, and its agreed scope can support fpga and related engineering roles.
Discuss your hiring plan
Tell us what you’re building, who you need and when you need them. Choose Specialist Recruitment for a specific hire or Embedded Recruiter support for a wider hiring plan.
Prefer email? webform@runtimerec.com
