Senior FPGA Engineer | High Performance Hardware

Senior FPGA Engineer | High Performance Hardware
Philadelphia area, USA | Permanent | Relocation support

You've designed your own IP. You've fought for timing closure. Now take ownership of hardware where every performance improvement matters.

I'm recruiting for an established technology-driven business developing demanding, performance critical FPGA systems.

You'll work directly with researchers and software engineers to turn mathematical models and complex algorithms into working hardware. You'll understand the problem, shape the architecture and stay involved through deployment and subsequent improvements.

Own the design through to production

This is a role for someone who enjoys building original functionality and solving the difficult problems that come with it.

You'll own architecture, custom RTL, simulation, verification, implementation, timing closure, board bring-up and production deployment. You'll also measure how your designs behave in use and improve them as requirements evolve.

The work involves deciding which calculations belong in hardware, how to organise the datapath and where architectural changes will deliver meaningful improvements in latency, throughput and resource use.

Development is iterative, with short feedback loops between the engineers building the systems and the people using them. As designs become more complex, timing closure calls for careful analysis and architectural decisions beyond simply adding another pipeline stage.

Interesting engineering. A team you can stay with.

You'll join an established engineering team with strong retention and a collaborative working style. People share knowledge, ask questions and value colleagues who can explain their thinking and listen to other approaches.

The work moves quickly, but the emphasis when problems arise is on understanding and fixing them together.

The business invests in its hardware capability, giving engineers room to explore ideas, test alternatives and improve the systems they own.

The engineering environment

High performance FPGA platforms and internally developed IP. Strong digital design fundamentals matter more than your preferred HDL.

AI development tools support tasks such as boilerplate generation, reviews and log analysis. You remain responsible for the architecture, engineering tradeoffs and correctness of the finished design.

What you need to bring

• Typically eight or more years of FPGA or ASIC architecture, design and development experience.
• Original IP you can explain in detail, including the architecture, your personal contribution and the decisions behind it.
• Hands-on timing closure experience and evidence of improving a demanding design's performance.
• Strong VHDL, Verilog or SystemVerilog skills and sound digital design fundamentals.
• Experience taking designs through verification and onto working hardware.
• Clear communication, curiosity and the ability to collaborate with researchers and engineers from different disciplines.
• A relevant degree in engineering, computer science, mathematics or a related field.

Ethernet, PCIe and software development experience are useful. Backgrounds in telecommunications, networking, instrumentation, video processing, photonics and defence can all be relevant. What matters is the engineering you've personally done.

Compensation and location

A competitive package combining base salary and bonus, with flexibility for exceptional relevant experience.

This is an office based role in the Philadelphia area. Relocation support is available for suitable candidates, and the company covers approved interview travel.

Applicants must already have US work authorisation, or be Australian or Canadian citizens eligible for an employer-supported US work visa. Overseas applications are currently limited to Australian and Canadian citizens. Permanent residency or residence in either country alone does not qualify. Visa eligibility will be assessed by the employer.

All applicants must be willing to work onsite in the Philadelphia area and relocate if required.

Let's talk about what you've built

I'm an engineer turned recruiter. I'd like to hear about the IP you designed, the timing problem that made you rethink an architecture, or the performance improvement you can put a number against.

Apply with your CV. Public projects or technical writing are welcome, but aren't required. The company and full application context will be discussed privately before any submission.

Lance Harvie | RunTime Recruitment