Processors are one of the most flexible components in an embedded designer’s toolbox. Processor design flexibility has evolved through hardware and software standardization and technology advancements.
The reduced instruction set computer (RISC) is arguably one of the most commonly implemented processor architectures.
Popular examples of RISC-based processors include PowerPC, ARM and MIPS. Along with the RISC architecture, robust software tools and high-level programming languages have enabled the use of processors in almost every conceivable type of embedded system.
SRAM-based FPGA flexibility can be further enhanced by embedding processors within the FPGA component. The embedded processor can be implemented as a soft, firm or hard core. Potential benefits associated with implementing a processor within an FPGA include reduced obsolescence, increased design content ownership, and fewer board-level components. Figure 14.1 below illustrates system components which may be able to be implemented within an FPGA.
Figure 14.1 potential FPGA implementation
The implementation of an embedded processor within an FPGA requires many of the same decisions and trade-offs required to implement a discrete processor design. Some of the factors influencing an embedded processor implementation include clear and concrete system requirements, good design methodology, efficient co-design , and proper design partitioning.
There are multiple hardware and software trade-offs that must be completed to implement a processor within an FPGA. Some design considerations include selection of the processor core, selection of the peripherals blocks and IP, processor memory architecture and design element interconnection.
Some software design considerations include informed coding, selection and use of a real-time operating system (RTOS), and device driver development. Both software and hardware tools are critical factors, and every effort should be taken to select the best tools available.
FPGA embedded processor types
FPGA processor cores are IP and can be categorized into the three standard IP types: soft, firm, or hard. Soft cores are processor implementations in an HDL language without extensive optimization for the target architecture. Soft cores typically have lower performance and are less efficient in terms of resource utilization. Firm cores are also HDL implementations but have been optimized for a target FPGA architecture.
Figure 14.2. FPGA hard and soft processor example
Altera’s Nios-II and Xilinx’s MicroBlaze processors are examples of firm processor cores. Hard cores are a fixed-function gate-level IP within the FPGA fabric. Xilinx’s Virtex-II Pro and Virtex-4 405 PowerPC core are examples of a hard processor core. Figure 14.2 above shows a hard and soft processor example.