Freescale Unveils Kinetis KL02, an Ultra Small (1.9×2.0mm) ARM Cortex M0+ Microcontroller

Freescale Semiconductor introduced the Kinetis KL02, the world’s smallest ARM MCU, at Embedded World 2013. KL02 is an ARM Cortex M0+ micro-controller designed to address the miniaturization needs of the Internet of things, and its size (1.9×2.0mm) makes it suitable for applications such as ingestible healthcare sensing, portable consumer devices, remote sensing nodes, and wearable devices. Kinetis KL02 MCU features …

Quad Ethernet 10GBASE-T PHY Targets Top-of-Rack Switches

Thank you for recommending “”. Your recommendation has been successfully processed. Date Posted: November 12, 2012 03:13 PM While 1-Gbit/s Ethernet is everywhere, the 10-Gbit/s version is slowly ramping up now that low-power chip designs have become available. As the data volume continues to increase in data centers, there’s growing pressure to add more 10G capability. That means more …

New JESD204B Interface Speeds And Simplifies ADC To FPGA Interconnection

Developers in communications and industrial/commercial digital applications often come across problems when implementing the connection between a high-resolution analog-to-digital converter (ADC) and an ASIC or FPGA. JEDEC has released a high-speed serial bus to increase productivity. Previously, connections used a low-voltage differential signaling (LVDS) differential bus. With up to 14 to 16 bits of parallel data from an ADC and …

Free Downloadable Spice Tools Capture And Simulate Analog Circuits

Most companies used to be concerned that models would reveal their secret intellectual property (IP). But now that it’s possible to encode the details, most analog semiconductor companies provide Spice models of their devices. In fact, several companies offer free downloadable Spice simulators or “Spice-like” software that provides for schematic capture and simulation.  For more than 15 years, Linear Technology …

Package Interconnects Can Make Or Break Performance

Chip and package designers can select from a bewildering catalog of interconnect technologies. Interconnects between the die and package include traditional wire-bond and flip-chip solder bumps, flip-chip gold-to-gold and copper pillar technologies, and embedded technologies like embedded wafer-level ball-grid array (eWLB). Within a package, die can be side-by-side, stacked, flipped piggyback on each other, or interconnected with the latest chip-to-chip …