250-Msample/s 16-Bit ADCs Incorporate Fast JESD204B Interface

With the release of JEDEC’s JESD204B serial data interface, designers are abandoning the 14- to 16-bit parallel differential low-voltage differential signaling (LVDS) connections from analog-to-digital converters (ADCs) to FPGAs, DSPs, or some ASICs. This reduces the number of lines and lengthens the runs for a simpler circuit. Recently, Texas Instruments adopted the JESD204B interface for its 16-bit ADS42JB69 ADC. The …