TOKYO — Spansion Inc. (Sunnyvale, Calif.) has developed a new bus Interface called HyberBus, targeting embedded systems, such as automotive instrument clusters, that demand “instant-on” and an “interactive graphical user interface.” The company claims its proprietary interface offers low latency, high read throughput, and low pin-count.
The HyperBus interface is available for licensing from Spansion.
Spansion also announced that it will become the first flash memory chip vendor to launch HyperFlash NOR memory devices that take advantage of the new interface.
Claiming that the new device is “the world’s fastest” NOR flash memory, Spansion noted that its read throughput is up to 333 megabytes per second — more than five times faster than an ordinary Quad SPI (Serial Peripheral Interface) flash currently available. Spansion has also kept the pin number of HyperFlash NOR memory devices to 12, one-third the number in Parallel NOR flash.
The initial read access time is 92 nanoseconds.
With this increased performance at a minimum pin count, Hironaga Ino, Spansion’s senior director, responsible for NOR product line, described HyperFlash as a new device that “combines the best of both worlds of Parallel and SPI NOR flash.”
Spansion’s announcement of “HyperBus interface” for embedded systems and “HyperFlash” for NOR memory sets the tone for Spansion’s new business strategy. After the acquisition of Fujitsu Semiconductor’s MCU and analog businesses last summer, Spansion is no longer a memory chip vendor. Rather, it portrays itself an “embedded systems solution” company.
The new interface consists of an 8-pin address/data bus, a differential clock (2 signals), one Chip Select and a Read Data Strobe for the controller, reducing the overall cost of the system.
Despite an IP license necessary for the use of HyperBus, Spansion is confident that the new interface will be designed into a variety of products including SoCs, MCUs, memories and peripherals. Spansion’s Ino said at a press conference, “More than two leading SoC vendors are already implementing the new HyperBus Interface on their chips.”
In addition, Freescale is rolling out a number of HyperBus-based MCUs in the near future. Freescale has worked with Spansion to develop the new interface, said Ray Cornyn, vice president of product management for Freescale’s automotive microcontrollers business.
Spansion will release engineering samples of the HyperFlash NOR memory device in the second quarter this year, according to Ino. The launch of production samples is slated for the third quarter. Spansion is manufacturing the chip, based on a 62-nm process technology, at the company’s fab in Austin, Texas.
Why a new bus interface?
For many embedded system OEMs, the most attractive feature in Spansion’s HyperBus Interface is that it allows for “much faster boot time, direct execute-in-place (XIP) from flash, reducing the amount of RAM needed,” explained Spansion.
Speaking of the target market, Spansion’s Ino stressed a groundswell of demand among car OEMs, Tier Ones, and automotive chip suppliers.
Consider, for example, automotive instrument clusters, said Ino.