Data Transfer Manager Offloads Low Power Microcontroller

Silicon Labs delivered precision analog microcontroller based on the Arm Cortex-M3
(see Precision Analog 32-bit Micro Uses A Crossbar Interconnect) earlier this year.
The latest 50 MHz Precision32 SiM3L1xx (Fig. 1) products incorporate a number of new features including
a DC-DC buck converter initially found on their 8-bit platforms
(see Integrated DC-DC Buck Converter Reduces 8-bit Power Requirements).
It targets a range of low power applications including wireless applications.


Figure 1. Silicon Labs’ SiM3L1xx is based on an Arm Cortex-M3 and it includes multiple Data Transfer Managers that augment DMA support.

Silicon Labs supercharged its DMA controllers by adding multiple Data Transfer Managers (DTM).
The DTM uses DMA that adds features such as chaining and cycling to offload the processor.
DMA already offloads a processor but it is normally limited to moving data around and usually just one block at a time.
Wireless protocols often need much more so it is either a matter of getting the processor to handle the details or to use a DTM.
This can reduce system overhead and power by as much as 35%.

The DTM can check peripheral details to see when particular actions have occurred or been completed.
For example, one DTM channel could handle data stream translation and encryption while another initializes the radio via an SPI interface.
The data packet would not be sent to the radio until after the latter completes and the initial data transfer through crypto unit has completed.
Normally a processor would have to be involved in all the computation and transfers providing a completely formatted packet for transmission.
Channels can operate in a dependent fashion or independently.

The DTMs can be used for a range of communication protocols but they have access to all peripherals.
This allows them to be used for other interface chores as well.
Debugging can be a challenge but the system trace facility does capture DTM action transitions.
Filter for these actions is not a feature of the trace tool yet.

Another feature is the sensor interface manager (SIM).
The SIM can operate while the processor is in sleep mode.
It has access to the range of peripherals and can transfer data to memory directly.
It is more configurable than DMA and it 500nA of power.
It can handle 500 samples/s.

The chip has some interesting LCD interface support using a sub-microamp power controller designed to reduce display power consumption.
The typical bias for the display is 3V to -3V.
The system can perform a make-before-break transition at 0V so the switching topology only needs to generate half the charge of the usual 6V swing.
The approach scales proportionally with the display in terms of power savings.
There is no visual artifact using this feature.

The low power chip only uses 175 µA/MHz in active mode and less than 250 nA in sleep mode.
It only takes 4 µs to wake up from this mode.
The the real-time clock (RTC) is enabled at 3.6 V.
The chip supports dynamic voltage scaling and the DC-DC converter can be used to drive additional devices such as the radio.
To keep an eye on power utilization Silicon Labs provides their Power Estimator application (Fig. 2).


Figure 2. Silicon Labs’ Power Estimator application lets developers see power utilization details based on a basic system design.

The graphical Power Estimator tool provides tool tips (Fig. 3) to developers.
These recommendations can be followed to check out “what if” scenarios.
The tool takes into account the power peripherals consume, not just the processor, because of the level of power management control a developer has over the chip and its components.


Figure 3. Power Estimator tool tips provide power related design guidance to developers.

The Power Estimator is just part of the toolkit from Silicon Labs.
Their Precision32 AppBuilder allows developers to design power settings and transitions based on a mode transition feature of the tool.
Software development support is in the form of the Precision32 IDE, an Eclipse-based tool.

There are a number of hardware development platforms (Fig. 4) available from Silicon Labs.


Figure 4. Silicon Labs’ SiM3L1xx development kit can run on a single battery.

Silicon Labs has incorporated a range of analog periphals including a 12-bit SAR ADC along with the power management and control features like DTM and SIM to make it a great platform for wireless sensor and control applications.
They also make it very interesting for conventional microcontroller applications where power savings are key.