Editor’s Note: In this DSP design tip, Richard Lyons, author of “Understanding DSP,” describes some of the methods and algorithms you will need to be sure you built a well-behaved digital quadrature oscillator for use in digital TV QAM systems or in advanced telecom and fiber optic networks.
Described here is how to design a well-behaved digital quadrature oscillator, whose output is Yi(n) + jyq (n), having the structure shown in Figure 13–79(a) below.
If you’re new to digital oscillators, that structure looks a little complicated but it’s really not so bad. If you look carefully, you see the computations are
Those computations are merely the rectangular form of multiplying the previous complex output by a complex exponential ejΘ as
So the theory of operation is simple. Each new complex output sample is the previous output sample rotated by Θ radians, where Θ is 2πft/fs with ft and fs being the oscillator tuning frequency and the sample rate, respectively, in Hz.
To start the oscillator, we set the initial conditions of yI (n–1) = 1 and yq (n–1) = 0 and repeatedly compute new outputs, as time index n advances, using Eq. (13–134).
This oscillator is called a coupled quadrature oscillator because the both of its previous outputs are used to compute each new in-phase and each new quadrature output. It’s a useful oscillator because the full range of tuning frequencies are available (from nearly zero Hz up to roughly fs/2), and its outputs are equal in amplitude unlike some other quadrature oscillator structures. The tough part, however, is making this oscillator stable in fixed-point arithmetic implementations.
Depending on the binary word widths, and the value Θ, the output amplitudes can either grow or decay as time increases because it’s not possible to represent e jΘ having a magnitude of exactly one, over the full range of Θ, using fixed-point number formats. The solution to amplitude variations is to compute yi'(n–1) and yq'(n–1) and multiply those samples by an instantaneous gain factor G(n) as shown in Figure 13–79(b).
The trick here is how to compute the gain samples G(n). We can use a linear automatic gain control (AGC) method, as shown in Figure 13–80(a) below where α is a small value, say, α = 0.01. The value R is the desired Root Mean Square (RMS) rms value of the oscillator outputs.
This AGC method greatly enhances the stability of our oscillator. However, there’s a computationally simpler AGC scheme for our oscillator that can be developed using the Taylor series approximation we learned in school.
Here’s how: We can define the desired gain as
This is the desired output signal magnitude Mdes over the actual output magnitude Mact. We can also represent the gain using power as
where the constant Pdes is the desired output signal power and Pact is the actual output power. The right side of Eq. (13–137) shows Pact replaced by the desired power Pdes plus an error component E, and that’s the ratio we’ll compute. To avoid square root computations and, because the error E will be small, we’ll approximate that ratio with a two-term Taylor series expansion about E = 0 using
Computing the Taylor series’ coefficients to be α0 = 1 and α1 = –1/2Pdes, and recalling that E = Pact–Pdes, we estimate the instantaneous gain as
on image to enlarge.
If we let the quadrature output peak amplitudes equal 1/√ 2, Pdes equals 1/2 and we eliminate the division in Eq. (13–139) obtaining
The simplified structure of the G(n) computation is shown in Figure 13–80(b). As for practical issues, to avoid gain values greater than one (for those fixed-point fractional number systems that don’t allow numbers ≤1), one suggestion is to use rounding, instead of truncation, for all intermediate computations to improve output spectral purity.
Rounding also provides a slight improvement in tuning frequency control. Because this oscillator is guaranteed stable, and can be dynamically tuned, it’s definitely worth considering for real-valued as well as quadrature oscillator applications.
Used with the permission of the publisher, Prentice Hall, this on-going series of articles on Embedded.com is based on copyrighted material from “Understanding Digital Signal Processing, Second Edition” by Richard G. Lyons. The book can be purchased on line.
Richard Lyons is a consulting systems engineer and lecturer with Besser Associates. As a lecturer with Besser and an instructor for the University of California Santa Cruz Extension, Lyons has delivered digitasl signal processing seminars and training course at technical conferences as well at companies such as Motorola, Freescale, Lockheed Martin, Texas Instruments, Conexant, Northrop Grumman, Lucent, Nokia, Qualcomm, Honeywell, National Semiconductor, General Dynamics and Infinion.