The basics of low power programming on the Cortex-M0

The ARM Cortex-M0 processor has been designed to provide low-power advantages over other processors. In this article I will discuss how some of these features can be used to advantage in programming for this architecture.


Cortex-M0 sleep modes

The Cortex-MO processor supports normal sleep and deep sleep modes. The sleep modes can be entered using WFE or WF1 instructions, or using Sleep-on-Exit feature (Figure 17.1 below).

The basics of low power programming on the Cortex-M0


Figure 17.1: Normal sleep and deep sleep can both be entered using various methods.

The actual differences between normal sleep mode and deep sleep mode on a microcontroller depend on the system level design of the chip. For example, normal sleep might result in some of the clock signals being switched off, whereas deep sleep might also reduce voltage supplies to the memory blocks and might switch off additionl components in the system.


After entering sleep mode, the processor can be awakened using interrupt requests, debug requests, events, and reset. Figure 17.2 below summarizes the wakeup conditions for interrupt requests.

The basics of low power programming on the Cortex-M0


Figure 17.2: Wakeup conditions for interrupt requests.

In the System Control Block of the Cortex-MO processor, there is a programmable register called the System Control Register (SCR; Table 17.1 below). This register contains several control bits related to sleep features.

The basics of low power programming on the Cortex-M0


Table 17.1: System Control Register (OxEOOOED10)

For the users of CMSIS-compliant device driver library, the System Control Register can be accessed by the register symbol “SCB->SCR.” For example, to enable deep sleep mode, you can use



SCB->SCR | = 1<<2; /* Enable deep sleep feature */


The System Control Register must be accessed using a word-size transfer.

Using WFE and WFI in Programming

In most cases, the device driver libraries from microcontroller vendors contain functions to enter low-power modes that are customized for their microcontrollers.


Using these functions will help you to achieve the best level of power optimization for your microcontrollers. However, if you are developing C code that needs to be portable between multiple Cortex-M microcontrollers, you can use the CMSIS functions shown in Table 17.2 below to access the WFE and WFI instructions directly.

The basics of low power programming on the Cortex-M0


Table 17.2: CMSIS Intrinsic Functions for WFE/WFI Instructions

For users who are not using CMSIS-compliant device drivers, you can use intrinsic functions provided by the C compiler or inline assembly to generate WFE and WFI instructions.


In these cases, the software code will be tool chain dependent and less portable. For example, the ARM RealView Development Suite or Keil MDK provides the following C intrinsic functions (as shown in Table 17.3 below, where unlike the CMSIS version, they are in lowercase letters).

The basics of low power programming on the Cortex-M0


Table 17.3: ARM RealView Compiler or Keil MDK Intrinsic Functions for WFI and WFE

Because the WFE can be awakened by various sources of events, including past events, it is usually used in an idle loop. For example,



while (proceesinq required()==0) {
   
_wfe();
   
}


Users of assembly programming environments can use WFE and WFI directly in their assembly codes.





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