The problem with disruption is that it’s so… disrupting. This is also what’s so attractive about it. The important question is what’s on the intended receiving end of that disruption. If it is your competitors’ business models and market positions, OpenCL provides a remarkable lever for achieving those objectives.
OpenCL executes across heterogeneous platforms spanning CPUs to GPUs to FPGAs. It is a familiar, C-like language and framework that allows developers to exploit high-performance compute engines, like Pico Computing’s HPC modules and clusters. When OpenCL is targeted to such systems, it can dramatically transform a product’s value proposition — and get that value to market faster.
OpenCL is a breakthrough precisely because it enables developers to accelerate the real-time execution of their algorithms quickly and easily — particularly those that lend themselves to the considerable parallel processing capabilities of FPGAs (which yield superior compute densities and far better performance/Watt than CPU- and GPU-based solutions).
From a product enablement standpoint, OpenCL becomes even more interesting because developers can build truly optimized, dialed-in systems for their software, as opposed to limiting product performance by running the software on generic, general-purpose, low-performance hardware. Hardwiring the program execution in dedicated hardware can improve the application by orders of magnitude. Software running on a CPU — or even on general-purpose GPUs — can’t touch that, especially when power consumption is considered.
In the case of FPGA-based hardware, OpenCL code automatically compiles to the native description of the targeted device, e.g., Verilog and its synthesized bitstream file. However, the OpenCL developer is shielded from these details. And that’s just the point: There is no need for the developer to understand hardware description languages (HDLs) or any esoteric and proprietary FPGA design flows. Rather, developers get to reap benefits that were formerly the exclusive province of FPGA designers. OpenCL democratizes high-performance computing, making high-performance technology available to the masses.
All of which brings us to 10 reasons why this ought to matter to you right now.
1. It’s easy.
If you know C, you essentially already know OpenCL. FPGAs are famously difficult to design, especially via the respective vendors’ tool flows, which have proven to be a significant impediment to wider deployment. The many advantages of FPGAs have gone largely untapped by the many developers lacking these very specific skills. OpenCL changes all that. FPGAs now enjoy the programmability of X-86, putting extreme acceleration within the average developer’s reach.
2. It’s flexible.
OpenCL is hardware-agnostic — it can be compiled to CPUs, GPUs, DSPs, APUs, or FPGAs. It is up to the individual vendors to create and support the APIs that allow OpenCL to compile to their devices. What’s more, once your code has been created, it can be targeted to any of the supported device families at any time for purposes from performance comparisons to product migration. Whether you are targeting your code to server-class hardware or a desktop acceleration appliance, the process is the same.
3. It supports evolving designs.
Because they are reconfigurable, FPGAs allow high-performance systems to evolve without replacing hardware. And for those sections of a design subject to change throughout the design process, implementing those changes might be as simple as recompiling the code targeted to the affected FPGA(s). Even after the product is deployed in the marketplace, upgrades or custom configurations can be done remotely in the field, increasing the product’s lifetime value and serviceability. It’s a strategy that just makes sense.
4. It delivers immediate performance improvements.
Can OpenCL produce the same sort of optimized results of hand coding? Of course not. But it may not have to. If you could realize a 10-50X improvement in performance in a matter of weeks using an OpenCL-based design approach, as opposed to a 100X improvement that may take many months of HDL coding, that might be more than good enough. The combination of OpenCL with FPGAs can afford to waste some peak performance yet still dramatically outperform CPUs or GPUs. This is due to the inherent parallelism of FPGAs — a hardware solution that breaks with the conventional sequential execution of CPUs and performs far more work per low-power clock cycle. What would even a 2X improvement do for your competitive profile?
5. It shortens time to market.
In terms of engineering management, the combination of a C-like language with reconfigurable FPGA-based hardware provides a new design paradigm that simultaneously reduces risk and shortens time to market. Here is a product design process that not only facilitates rapid prototyping but also provides the ability to produce a better product faster — and one that allows for painless incremental improvement. Using an OpenCL approach means you can get a product to market quickly and then, to the extent that it makes sense, optimize the FPGA implementations with hand-coded HDL. In either case, you’ll save months of development effort and realize revenue faster.
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